What is described as two cross-coupled NAND or NOR gates with the output of one feeding the input of the other?

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Multiple Choice

What is described as two cross-coupled NAND or NOR gates with the output of one feeding the input of the other?

Explanation:
A latch is the basic memory element formed by two cross-coupled gates with the output of one feeding the input of the other. The feedback between the gates creates two stable states, so once one state is established it holds that bit until the inputs actively drive it to the other state. Using cross-coupled NOR gates gives an SR-latch with active-high inputs; using cross-coupled NAND gates gives the same idea but with active-low inputs. This level-sensitive element stores a bit without a clock, unlike a register that needs a clock edge to transfer data, a decoder that translates binary to a one-hot pattern, or a multiplexer that chooses one of several inputs.

A latch is the basic memory element formed by two cross-coupled gates with the output of one feeding the input of the other. The feedback between the gates creates two stable states, so once one state is established it holds that bit until the inputs actively drive it to the other state. Using cross-coupled NOR gates gives an SR-latch with active-high inputs; using cross-coupled NAND gates gives the same idea but with active-low inputs. This level-sensitive element stores a bit without a clock, unlike a register that needs a clock edge to transfer data, a decoder that translates binary to a one-hot pattern, or a multiplexer that chooses one of several inputs.

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