Two cross-coupled NOR gates where applying a 1 at either input drives the opposite output low describe which memory element?

Two cross-coupled NOR gates where applying a 1 at either input drives the opposite output low describe which memory element?

• A. S-R Latch
• B. Latch
• C. SR Flip-Flop
• D. R-S Latch

Answer: (D)

Two cross-coupled NOR gates form a memory element known as an RS (or SR) latch. In this arrangement, each input feeds a NOR gate whose output is fed back to the other gate. When a high level is applied to one input, the corresponding NOR gate’s output goes low, and due to the feedback the opposite output settles to the complementary value. This creates a stable state that the circuit remembers as long as the inputs remain at low (idle) levels. If both inputs return to zero, the previous state is held, which is why it’s called a memory element. This behavior matches the description: a 1 on either input drives the opposite output low, and the state is maintained without a clock signal. A flip-flop, in contrast, is typically clocked or edge-triggered, whereas this arrangement is a simple, asynchronous latch. The term used here for this device is RS latch (also known as SR latch); the naming order is just a convention in different texts, but it refers to the same memory element.

Two cross-coupled NOR gates form a memory element known as an RS (or SR) latch. In this arrangement, each input feeds a NOR gate whose output is fed back to the other gate. When a high level is applied to one input, the corresponding NOR gate’s output goes low, and due to the feedback the opposite output settles to the complementary value. This creates a stable state that the circuit remembers as long as the inputs remain at low (idle) levels. If both inputs return to zero, the previous state is held, which is why it’s called a memory element.

This behavior matches the description: a 1 on either input drives the opposite output low, and the state is maintained without a clock signal. A flip-flop, in contrast, is typically clocked or edge-triggered, whereas this arrangement is a simple, asynchronous latch. The term used here for this device is RS latch (also known as SR latch); the naming order is just a convention in different texts, but it refers to the same memory element.